Nonvolatile semiconductor memory device which erases data in...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185180, C365S185240, C365S185290

Reexamination Certificate

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11213889

ABSTRACT:
In a data erasing method of a nonvolatile semiconductor memory device, cells are subjected to the processings of executing programming by applying a voltage to the cells to set their threshold values at a given level or more, erasing the cells to set their threshold values at a lower level or less, executing weak programming once on a cell whose threshold value is lower than a further lower level, by applying a lower voltage to the cell, repeating the weak programming on the cell when its threshold value is still lower than the further lower level, until the value reaches the further lower level or more, verifying whether a cell is present whose threshold value is higher than the lower level, and returning the processing to the processing of setting the threshold values of the cells at the lower level or less, when verifying that the above cell is present.

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patent: 6834012 (2004-12-01), He et al.
patent: 6967873 (2005-11-01), Hamilton et al.
patent: 7046559 (2006-05-01), Saito
patent: 7079424 (2006-07-01), Lee et al.
patent: 8-255489 (1996-10-01), None
patent: 2000-260189 (2000-09-01), None

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