Nonvolatile semiconductor memory device incorporating level shif

Details Nonvolatile semiconductor memory device incorporating level shif Nonvolatile semiconductor memory device incorporating level shif

1989-12-21

1991-10-15

Fears, Terrell W.

Static information storage and retrieval

Floating gate

Particular biasing

36518911, G11C 1602

Patent

active

050580639

ABSTRACT:
In a nonvolatile semiconductor memory system comprising a memory chip and a batttery for driving the memory chip, the memory chip includes a memory-cell matrix, a row decoder, a first level-shifting circuit for shifting the level of the output of the row decoder, a column-selecting circuit, a column decoder, a second level-shifting circuit for shifting the level of the output of the column decoder, a sense amplifier, a third level-shifting circuit for shifting the level of the data which is to be written into the memory-cell matrix, a voltage-booster circuit, a timer circuit, and an oscillator circuit. The nonvolatile semiconductor memory system operates stably when driven by a low voltage or by a voltage over a broad range.

REFERENCES:
patent: 4628487 (1986-12-01), Smayling
patent: 4769787 (1988-11-01), Furusawa et al.
patent: 4794564 (1985-07-01), Watanabe
patent: 4870615 (1989-09-01), Maruyama et al.

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