Nonvolatile semiconductor memory device in which an amount...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S094000, C365S185030, C365S185210, C365S185280

Reexamination Certificate

active

07889558

ABSTRACT:
A nonvolatile semiconductor memory device having a plurality of word lines and a plurality of bit lines and a plurality of sense amplifiers, each amplifier being connected to one of the plurality of bit lines respectively and a memory cell array including a memory cell region including a plurality of memory strings having a plurality of electrically reprogrammable memory cells connected in series, each of the memory cells having two or more storage states, said plurality of memory cells being connected to a corresponding word line of the plurality of word lines respectively, the plurality of memory strings being connected to a corresponding bit line of the plurality of bit lines respectively, and at the time of programming all of the plurality of bit lines are selected, the number of the storage states being different in two of the memory cells which are adjacent on the same bit line.

REFERENCES:
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patent: 7116603 (2006-10-01), Kanda et al.
patent: 7196950 (2007-03-01), Kanda et al.
patent: 7224617 (2007-05-01), Takeuchi
patent: 7269073 (2007-09-01), Takeuchi
patent: 7539053 (2009-05-01), Kanda
patent: 2005/0207220 (2005-09-01), Takeuchi
patent: 2007/0124531 (2007-05-01), Nishihara
patent: 2007/0147114 (2007-06-01), Takeuchi
patent: 2007/0291556 (2007-12-01), Kamei
patent: 2004-152405 (2004-05-01), None
patent: 2004-327865 (2004-11-01), None
patent: 2005-267687 (2005-09-01), None
patent: 2005-267821 (2005-09-01), None

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