Nonvolatile semiconductor memory device having structure...

Details Nonvolatile semiconductor memory device having structure... Nonvolatile semiconductor memory device having structure...

2000-07-12

2002-03-05

Nguyen, Tan T. (Department: 2818)

Static information storage and retrieval

Floating gate

Multiple values

C365S185330

Reexamination Certificate

active

06353553

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device and a data storage system, and more particularly, it relates to a structure using electrically writable/erasable nonvolatile semiconductor memory cells.
2. Description of the Background Art
An electrically writable/erasable nonvolatile semiconductor memory (flash memory) has come into wide use as a memory for storing program codes substituting for an EPROM (Erasable Programmable Read Only Memory) or a masked ROM (Read Only Memory) with such an advantage that the same enables rewriting on a substrate.
In recent years, a mass storage flash memory capable of storing image data and sound data is developed following refinement in the semiconductor working technique, with rapid progress of application to a digital still camera or a portable audio apparatus.
In order to enable recording of motion picture data, the capacity of the flash memory must be further increased.
In addition to refinement in the semiconductor working technique, a multivalued technique can be mentioned as an important technique for implementing a larger capacity of the flash memory. The flash memory generally applies a high electric field to a floating gate isolated from the periphery by an isolation film for injecting or emitting electric charge thereby changing the threshold of a memory cell and storing data.
A general flash memory (binary flash memory) associates a high-threshold state of a memory cell with “1” (or “0”) and a low-threshold state the memory cell with “0” (or “1”). Thus, a single memory cell can store one-bit data (binary data).
A flash memory (multivalued flash memory) employing the multivalued technique sets the threshold of a memory cell in at least three states. For example, a flash memory capable of storing four values sets the threshold of a memory cell in four states successively in association with “11” (the lowest threshold state), “10”, “00” and “01” (the highest threshold state). Thus, a single memory cell can store two-bit data (multivalued data). Association between the -physical state of the memory cell and logical data can be arbitrarily set similarly to the case of the binary flash memory, as a matter of course.
When storing “1” (or “0”) in a memory cell, leaving the memory cell intact for a long time and thereafter reading the data in implementation of such a multivalued flash memory, the data disadvantageously becomes “0” (or “1”).
This problem is physically caused since electrons mainly injected into a floating gate pass through an energy barrier of an insulating film to be emitted to a semiconductor substrate or a gate or electrons are injected from the semiconductor substrate or the gate to change the threshold of the memory cell.
Referring to
FIG. 44
, the binary flash memory sets the threshold in the state “1” to 1 V to 1.7 V, the threshold in the state “0” to at least 4.3 V and a determination threshold in reading to 3 V, for example. In this case, each of the states “1” and “0” has a read margin of 1.3 V. In this case, false reading is caused when electrons corresponding to 1.3 V are injected/emitted.
On the other hand, the multivalued flash memory, sets the threshold in the state “11” to 1 V to 1.7 V, the threshold in the state “10” to 2.3 V to 2.7 V, the threshold in the state “00” to 3.3 V to 3.7 V and the threshold in the state “01” to at least 4.3 V, for example. When setting determination thresholds in reading to 2 V, 3 V and 4 V, each state has a read margin of only 0.3 V. Therefore, it follows that false reading is caused when electrons corresponding to 0.3 V are injected/emitted.
When a memory cell having a Vgs-Ids (Vgs: gate-source voltage, Ids: drain-source current) characteristic denoted by symbol F
1
in
FIG. 44
reaches the same state as a memory cell having a Vgs-Ids characteristic denoted by symbol F
2
due to emission of electrons from a floating gate, written data “01” is falsely read as “00” in the multivalued flash memory.
Similarly, when a memory cell having a Vgs-Ids characteristic denoted by symbol F
3
reaches the same state as a memory cell having a Vgs-Ids characteristic denoted by symbol F
4
, written data “11” is falsely read as “10” in the multivalued flash memory.
In the binary flash memory, data is correctly read whether a memory cell having the characteristic F
1
reaches the state of a memory cell having the characteristic F
2
or a memory cell having the characteristic F
3
reaches the state of a memory cell having the characteristic F
4
.
Thus, the binary flash memory is superior in data reliability to the multivalued flash memory although the binary flash memory and the multivalued flash memory are physically equivalent in data holdability to each other. Further, the binary flash memory is superior in consideration of the data transfer rate. In consideration of the cost and the storage capacity, however, the multivalued flash memory is superior as described above. For future benefit, therefore, development of a device effectively implementing all these characteristics is demanded.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a nonvolatile semiconductor memory device and a data storage system implementing a large storage capacity, improving reliability of data and enabling a high-speed operation.
A nonvolatile semiconductor memory device according to an aspect of the present invention includes a nonvolatile memory cell array including a plurality of memory cells and a control circuit for controlling a write operation, a read operation and an erase operation for the plurality of memory cells, and the control circuit writes binary data or multivalued data in a memory cell subjected to writing in response to a write request and reads the binary data or the multivalued data in response to the contents written in a memory cell subjected to reading in the read operation.
Preferably, the control circuit sets the memory cell subjected to writing in either a first state for erasing or an n-th state different from the first state when writing the binary data while setting the memory cell in any of n (at least three) different states in total ranging from the first state to the n-th state when writing the multivalued data. Further, the control circuit determines to which one of states ranging from the first state to a k-th state, where n is greater than k, or ranging from a (k+1)-th state to the n-th state the memory cell storing the binary data belongs while determining to which one of the n states in total the memory cell storing the multivalued data belongs in the read operation.
In particular, the control circuit determines to which one of the n states in total the memory cell storing the binary data belongs in the read operation and outputs a warning signal indicating change of the binary data when determining that the memory cell belongs to a state different from the first state or the n-th state. Alternatively, the control circuit determines to which one of the n states in total the memory cell storing the binary data belongs in the read operation and performs a write operation for rewriting the binary data in the memory cell when determining that the memory cell belongs to a state different from the first state or the n-th state.
According to the aforementioned nonvolatile semiconductor memory device, the binary data or the multivalued data of at least three values can be written or read in response to a request. Thus, data can be written and read at a high speed with high reliability at need while storing data of a large volume.
According to the aforementioned nonvolatile semiconductor memory device, further, displacement of the threshold can be detected with respect to the memory cell storing the binary data.
According to the aforementioned nonvolatile semiconductor memory device, the binary data can be rewritten (repaired) in the memory cell storing the binary data when detecting displacement of the threshold.
Preferably, the plurality of memory cells are divi

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