Nonvolatile semiconductor memory device having improved...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S210130, C365S200000

Reexamination Certificate

active

07061800

ABSTRACT:
In a memory cell array of an MRAM, a normal memory cell is compared with a reference memory cell which holds a reference value, thereby storing data of one bit per cell. Two spare memory cells store data of one bit as a whole. By writing complementary values to the two spare memory cells and connecting these spare memory cells to a sense amplifier, the stored data of one bit is read. A spare memory cell section which is often arranged in an array peripheral portion becomes more resistant against a variation in finished dimensions of elements and a success rate for replacing and relieving a defective memory cell by a spare memory cell increases.

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Roy Scheuerlein et al., “A 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch In Each Cell”, Feb. 2000, pp. 94-95, 128-129, 409-410, ISSCC Digest of Technical Papers, TA7.2.
M. Durlam et al., “Nonvolatile RAM Based on Magnetic Tunnel Junction Elements”, Feb. 2000, pp. 96-97, 130-131, 410-411, ISSCC Digest of Technical Papers, TA7.3.

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