Static information storage and retrieval – Floating gate – Particular connection
Patent
1999-02-18
1999-10-12
Le, Vu A.
Static information storage and retrieval
Floating gate
Particular connection
36518518, 36518524, G11C 700
Patent
active
059663286
ABSTRACT:
A flash EEPROM includes a an array of nonvolatile memory cells each having a cell transistor of a double gate structure and a program area for the floating gate of the cell transistor. The flash EEPROM is subjected to programming, flash erasing and read mode, each of a byte by byte mode. The flash EEPROM includes first through third selection transistors, for disconnecting the source, drain and control gate of the selected cell transistor from those of the unselected cell transistors in a byte for suppressing a disturbance between cell transistors.
REFERENCES:
patent: 5138576 (1992-08-01), Madurawe
patent: 5245566 (1993-09-01), Masuoka
Le Vu A.
NEC Corporation
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