Nonvolatile semiconductor memory device having a passivation fil

Details Nonvolatile semiconductor memory device having a passivation fil Nonvolatile semiconductor memory device having a passivation fil

1992-02-20

1994-12-20

Limanek, Robert

Active solid-state devices (e.g., transistors, solid-state diode

With means to control surface effects

Insulating coating

257649, 257323, H01L 21316, H01L 21318

Patent

active

053748476

ABSTRACT:
A memory cell is formed in the main surface area of a semiconductor substrate. An inter-level insulation film is formed on the substrate to cover the memory cell. An opening is formed in the inter-level insulation film to reach the memory cell. An internal wiring layer is electrically connected to the memory cell via the opening. A protection film is formed on the inter-level insulation film to cover the internal wiring layer. The protection film is formed of a material containing at least silicon and oxygen and the refractive index thereof is set within a range of 1.48 to 1.65.

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J. Miyamoto et al., Process Technologies for a 16 ns High Speed 1MB CMOS EPROM, 1990 Autumn Nat'l Conf. of the Institute of Electronics, Information and Communication Engineers, Oct. 1-4, 1990.
T. Fujiwara et al., Evaluation of Plasma Deposited Silicon Dioxide-Barrier Effect Against Water, Sep. 26-29, 1990.

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