Nonvolatile semiconductor memory device for preventing erroneous

Details Nonvolatile semiconductor memory device for preventing erroneous Nonvolatile semiconductor memory device for preventing erroneous

1993-03-18

1995-02-07

Yoo, Do Hyun

Static information storage and retrieval

Floating gate

Particular biasing

36518909, 365218, 36523003, 365900, G11C 700

Patent

active

053880692

ABSTRACT:
A nonvolatile semiconductor memory device has a plurality of word lines, a plurality of bit lines, a plurality of nonvolatile memory cells, and a source power supply circuit. Each of the nonvolatile memory cells is formed of a MIS transistor disposed at each intersection of the word lines and the bit lines, and a threshold voltage of the MIS transistor is externally electrically controllable. The source power supply circuit, which is connected to sources of the nonvolatile memory cells, is used to apply a first voltage to the sources of the nonvolatile memory cells to negate an influence caused by an over-erase phenomenon at the time of a reading operation. In the nonvolatile semiconductor memory device of the present invention, the selected memory cell is surely switched ON, and the non-selected memory cells are surely switched OFF, even though some of the non-selected memory cells are over-erased, because the influence caused by the over-erase phenomenon of the memory cells can be negated by applying the first voltage to the sources of the memory cells. Consequently, in the flash memory of the present invention, the non-selected memory cells are never erroneously selected, and thus the reliability of a flash memory becomes increased.

REFERENCES:
patent: 5047981 (1991-09-01), Gill et al.
patent: 5065364 (1991-11-01), Atwood et al.
patent: 5095461 (1992-03-01), Miyakawa et al.
patent: 5241507 (1993-08-01), Fong

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