Nonvolatile semiconductor memory device, electronic card and...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185180, C365S185200, C365S185230, C365S185280, C365S189090, C365S230060

Reexamination Certificate

active

07099193

ABSTRACT:
A nonvolatile semiconductor memory device includes a NAND cell with a plurality of electrically data rewritable memory cells being connected in series, word lines connected to control gates of the memory cells, a common source line connectable to one end of the NAND cell, a bit line connectable to a remaining end of the NAND cell, and a word line control circuit. The word line control circuit supplies a word line of a selected memory cell with a write voltage for writing data into this memory cell, supplies a word line of a memory cell located on the common source line side by N (N is an integer greater than or equal to 2) cells from the selected memory cell with a reference voltage for causing this memory cell to cut off, supplies an auxiliary voltage less than the write voltage to respective word lines of N−1 memory cells located between the selected memory cell and the memory cell at the position of the N cells, and supplies to word lines of remaining memory cells an intermediate voltage between the write voltage and the reference voltage.

REFERENCES:
patent: 5386422 (1995-01-01), Endoh et al.
patent: 6064611 (2000-05-01), Tanaka et al.
patent: 6987694 (2006-01-01), Lee
patent: 7020026 (2006-03-01), Guterman et al.
patent: 2002/0126532 (2002-09-01), Matsunaga et al.
patent: 10-283788 (1998-10-01), None
patent: 2002-260390 (2002-09-01), None

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