Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2005-02-15
2005-02-15
Nguyen, Viet Q. (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185220, C365S185240, C365S185030, C365S205000, C365S189011
Reexamination Certificate
active
06856550
ABSTRACT:
At the time of an operation of writing data to a specific memory cell in a memory block, a semiconductor memory device applies a write voltage for a predetermined period and, after that, performs a verifying operation by using a sense amplifier circuit and a comparator. When it is found as a result of the verifying operation that writing to the memory cell is insufficient, the writing operation is performed again by an instruction of a memory control circuit. At this time, the memory control circuit adjusts a write voltage.
REFERENCES:
patent: 5768192 (1998-06-01), Eitan
patent: 5844841 (1998-12-01), Takeuchi et al.
patent: 6002152 (1999-12-01), Guterman et al.
patent: 6011725 (2000-01-01), Eitan
patent: 6064591 (2000-05-01), Takeuchi et al.
patent: 6201733 (2001-03-01), Hiraki et al.
patent: 6215702 (2001-04-01), Derhacobian et al.
patent: 6243295 (2001-06-01), Satoh
patent: 6266281 (2001-07-01), Derhacobian et al.
patent: 6285597 (2001-09-01), Kawahara et al.
patent: 6331951 (2001-12-01), Bautista et al.
patent: 6490204 (2002-12-01), Bloom et al.
patent: 6493266 (2002-12-01), Yachareni et al.
patent: 6512701 (2003-01-01), Hamilton et al.
patent: 6538926 (2003-03-01), Kato et al.
patent: 6670669 (2003-12-01), Kawamura
patent: 6704222 (2004-03-01), Guterman et al.
patent: 10-228784 (1998-08-01), None
patent: 10-228786 (1998-08-01), None
patent: 02000030471 (2000-01-01), None
“Can NROM, a 2 bit, Trapping Storage NYM Cell, Give a Real Challenge to Floating Gate Cells?”, Boaz Eitan et al., the 1999 International Conference on Solid State Devices and Materials, Tokyo, Sep. 1999, pp. 522-524.
Related U.S. Appl. No. 10/146,021 filed May 16, 2002 (Our Reference No. 57454-581).
Related U.S. Appl. No. 10/146,031 filed May 16, 2002 (Our Reference No. 57454-562).
Related U.S. Appl. No. 10/211,338 filed Aug. 5, 2002 (Our Reference No. 57454-703.)
Kato Hiroshi
Ohtani Jun
Ooishi Tsukasa
Taito Yasuhiko
McDermott Will & Emery LLP
Nguyen Viet Q.
Renesas Technology Corporation
LandOfFree
Nonvolatile semiconductor memory device capable of uniformly... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nonvolatile semiconductor memory device capable of uniformly..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor memory device capable of uniformly... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3487856