Nonvolatile semiconductor memory device capable of decreasing la

Static information storage and retrieval – Floating gate – Particular connection

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36518517, G11C 1606

Patent

active

061117854

ABSTRACT:
A latch circuit functions as a write latch circuit when writing a defective address into a nonvolatile semiconductor memory cell array. The latch circuit also functions as a defective address latch circuit when the power voltage rises. Therefore, the layout area of the defective address setting circuit can be reduced as compared with the defective address setting circuit of the conventional flash memory of the FN--FN type provided with a write latch circuit and a defective address latch circuit.

REFERENCES:
patent: 5018104 (1991-05-01), Urai
patent: 5812467 (1998-09-01), Pascucci
patent: 5930169 (1999-07-01), Iwata et al.

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