Nonvolatile semiconductor memory device and writing method...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185110, C365S185220, C365S189090, C365S189050

Reexamination Certificate

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07023730

ABSTRACT:
A write circuit arranged per a bit line or a plurality of bit lines includes a plurality of latch circuits for storing data written to a plurality of pages and bit line connection circuits for connecting the plurality of latch circuits and bit lines and performs write operation to a plurality of pages by repeating continuous program operation which continuously performs program operations on a plurality of pages while a voltage generating circuit is continuously generating a voltage necessary for program operation and continuous verify operation which continuously performs verify operations on a plurality of pages while the voltage generating circuit is continuously generating a voltage necessary for verify operation.

REFERENCES:
patent: 6172917 (2001-01-01), Kataoka et al.
patent: 6477087 (2002-11-01), Tanaka et al.
patent: 6731538 (2004-05-01), Noda et al.
patent: 7-226097 (1995-08-01), None
patent: 11-328981 (1999-11-01), None

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