Nonvolatile semiconductor memory device and writing and erasing

Details Nonvolatile semiconductor memory device and writing and erasing Nonvolatile semiconductor memory device and writing and erasing

1998-08-31

1999-12-07

Nelms, David

Static information storage and retrieval

Floating gate

Disturbance control

36518518, 36518523, G11C 1134

Patent

active

059994444

ABSTRACT:
A nonvolatile semiconductor memory device and writing method of the same having a planarly dispersed charge storing means, which improve the programming disturbance characteristic, wherein gate electrodes of a plurality of memory elements are connected to a plurality of word lines, source regions or drain regions are connected with a common line (for example, a bit line or a source line) which crosses the word lines in an electrically insulated state, and the memory device includes a write inhibit voltage supplying means for supplying a source region and/or drain region of a memory element connected to the selected word line with a reverse bias voltage placing the source/drain region in a reverse bias state to the channel forming region via the common line and a non-selected word line biasing means for supplying a non-selected word line with a voltage in the polarity placing the non-selected word, line in a reverse bias state to the channel forming region.

REFERENCES:
patent: 4903236 (1990-02-01), Nakayama et al.
patent: 5654920 (1997-08-01), Watsuji et al.
patent: 5828600 (1998-10-01), Kato et al.

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