Nonvolatile semiconductor memory device and method of reducing r

Details Nonvolatile semiconductor memory device and method of reducing r Nonvolatile semiconductor memory device and method of reducing r

1997-06-17

1999-04-13

Nguyen, Tan T.

Static information storage and retrieval

Floating gate

Multiple values

36518502, 36518517, G11C 1600

Patent

active

058944354

ABSTRACT:
In a nonvolatile semiconductor memory device having a memory array of a NAND structure, threshold voltages of the word line voltage set at the time of reading are set to V.sub.WL00, V.sub.WL01, and V.sub.WL10, and one V.sub.WL10 among the threshold voltages is set to the negative voltage. By this, it becomes possible to set the threshold voltage distribution width of the memory transistor and the interval between one data and the next wider. As a result, writing control becomes easier and the disturbance/retention characteristics can be enhanced.

REFERENCES:
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5424978 (1995-06-01), Wada et al.
patent: 5596526 (1997-01-01), Assar et al.
patent: 5615151 (1997-03-01), Furuno et al.
patent: 5774397 (1998-06-01), Endoh et al.

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