Nonvolatile semiconductor memory device and method of operating

Details Nonvolatile semiconductor memory device and method of operating Nonvolatile semiconductor memory device and method of operating

1990-07-30

1992-02-25

Fears, Terrell W.

Static information storage and retrieval

Floating gate

Particular biasing

365218, G11C 1140

Patent

active

050918826

ABSTRACT:
In a nonvolatile semiconductor memory device such as EEPROMs which comprises a semiconductor substrate of one conductivity type having source and drain regions of opposite conductivity type for defining a channel region therebetween, and a stacked gate including a gate insulating film, a floating gate and a control gate provided through an interlevel insulator above the floating gate, an erase gate having an electrode is provided above the channel region through an insulating film which is contiguous to the gate insulating film. The erase gate is also insulated from the stacked gate through a side wall insulating film. For removing a charge carrier stored in the floating gate, a high voltage is applied to the erase gate, while grounding the source and drain regions and the control gate, respectively.

REFERENCES:
patent: 4462090 (1984-07-01), Iizuka
patent: 4794565 (1986-09-01), Wu et al.
patent: 4967393 (1990-10-01), Yokoyama

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