Nonvolatile semiconductor memory device and method of manufactur

Details Nonvolatile semiconductor memory device and method of manufactur Nonvolatile semiconductor memory device and method of manufactur

1997-12-23

1999-08-31

Nguyen, Tan T.

Static information storage and retrieval

Floating gate

Particular biasing

36518505, 257316, 257317, G11C 1600

Patent

active

059462400

ABSTRACT:
In a nonvolatile semiconductor memory device, buried diffusion layers are stripped parallel to each other in a surface region of a semiconductor substrate of a first conductivity type, and constitute bit lines. A select-gate electrode is formed on the semiconductor substrate, between source and drain regions, through a first gate insulating film to be parallel to the source and drain regions. At least one side of the select-gate electrode is offset from the source and drain regions. A floating-gate electrode is in contact with upper and side surfaces of the select-gate electrode through second and third gate insulating films, respectively, and with the semiconductor substrate through a fourth gate insulating film. The two sides of the floating-gate electrode at least partly overlap the source and drain regions. A control-gate electrode is formed on the floating-gate electrode to surround the floating-gate electrode through a fifth gate insulating film. The control-gate electrode perpendicularly intersects the source and drain regions to constitute a word line. A method of manufacturing a nonvolatile semiconductor memory device is also disclosed.

REFERENCES:
patent: 5394360 (1995-02-01), Fukumoto
patent: 5402374 (1995-03-01), Tsuruta et al.
patent: 5445983 (1995-08-01), Hong
patent: 5455792 (1995-10-01), Yi
patent: 5467308 (1995-11-01), Chang et al.
patent: 5477068 (1995-12-01), Ozawa
patent: 5614747 (1997-03-01), Ahn et al.
patent: 5656840 (1997-08-01), Yang
patent: 5691939 (1997-11-01), Chang et al.
patent: 5710735 (1998-01-01), Shin et al.
patent: 5753953 (1998-05-01), Fukumoto
Y. Ma et al., "A Novel High Density Contactless Flash Memory Array Using Split-Gate Source-Side-. . . Applications", 1994 Symposium on VLSI Technology Digest of Technical Papers, 1994, pp. 49-50.
Yale Ma et al., "A Dual-bit Split-Gate EEPROM (DSG) Cell in Contactless Array for Single-Vcc High Density Flash Memories", IEDM 94, 1994, pp. 57-60.

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