Static information storage and retrieval – Floating gate – Data security
Reexamination Certificate
2000-03-13
2001-03-06
Nguyen, Tan T. (Department: 2818)
Static information storage and retrieval
Floating gate
Data security
C365S185290, C365S195000
Reexamination Certificate
active
06198657
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device, and method of manufacturing the same, which can be set so that the user cannot change or reset the writing prohibition state, once the user has set the writing prohibition state.
2. Background Art
Nonvolatile semiconductor memory devices such as EPROMs (Electrically Erasable and Programable Read Only Memory) are memories which are electrically rewritable. Since stored information in those nonvolatile semiconductor memory devices does not disappear even if the electric power supply is turned off, those memory devices are widely used as external storage devices.
Those nonvolatile memory devices are manufactured as wafers and after cutting into chips, the separated nonvolatile memory devices are packaged for supplying to primary users. The primary user writes various types of programs and information into individual memory devices, which are then built into electronic equipment for final users.
For example, in mobile phones, a primary user writes in the nonvolatile memories a program for inputting using the number buttons, a program for sounding a mail arrival sound, and an identification number for sales to a final user. The final user can register a list of phone numbers in the nonvolatile memory. However, if the final user can rewrite the identification number with malicious intent, the final user will be able to use the phone by impersonating another final user free of charge.
In a game machine, a primary user writes in the nonvolatile memory a game program and sells the nonvolatile memory to the final user after setting it into a cartridge. The final user can enjoy the game by just inserting the cartridge into a slot of the game machine and can enjoy another game by changing the cartridge. The primary user could produce the cartridge by writing a program in a mask ROM. However, in order to produce the mask ROM, since it is necessary for a primary user to make a mask ROM for each program which is produced by the primary user, the mask ROM becomes high cost, and the manufacture of the mask ROM requires time consuming processes. In addition, if the program contains a bug, the program cannot be amended unless the mask ROM is re-produced. At the beginning of development, the above-described reasons makes the primary user utilize nonvolatile memory instead of a mask memory for reducing the period for development and for facilitating the correction of bugs.
When the nonvolatile memory is used as the cartridge of a game machine, it is necessary for a primary user to take a protective measures to prevent rewriting, because, if the final user rewrites the content of the memory by mistake, the game will not be reproduced. If the final user erases the content of the memory with malicious intent and illegally inputs another game program, the possibility of sale of the cartridge is lost. Thus, it is necessary for the primary user to take some measures to prohibit erasure. As described above, there have been demands for a nonvolatile memory provided with a prohibition measure for prohibiting rewriting, once data is written.
A conventional method developed for responding to such demands is to protect data by writing numeral values to a security bits provided in the nonvolatile memory, wherein the numerical values include one for permission and another for prohibition in accessing the memory device. In this method, when the writing prohibition data is written in the security bit, it becomes impossible to obtain access except for simultaneous and overall erasure. Data protection by such a security bit is disclosed in the journal of “Electronic Design” pp. 123-128, March, 1983.
Japanese Patent Application, First Publication No. Hei 5-35612 discloses another method of prohibiting additional writing, which comprises an additional writing prohibition circuit which prohibit additional writing after the writing is executed to the last address, in order to prohibit additional writing into a memory such as a one time programmable ROM (Read Only Memory).
The above described conventional apparatuses have a problem in that, for protecting the data, the final user can execute the setting process of the numerical value into the security bit at the final user's side. That is, since it is possible to remove the prohibition state of the security bit or the additional writing prohibition circuit by supplying them with an electric signal, it becomes possible for the final user to rewrite the data with malicious intent.
In the above-described Japanese Patent Application, First Publication No. Hei 5-35612, the designed is such that the additional writing prohibition state cannot be set unless the data is written in the last address.
SUMMARY OF THE INVENTION
It is therefore an objective of the present invention to provide a nonvolatile semiconductor memory device in which the final user can provide the prohibition state for erasing data or prohibiting rewriting, after shipment by the primary user.
According to a first aspect of the present invention, a nonvolatile memory device provided with an erasure prohibiting circuit for prohibiting erasure of the content of data in said nonvolatile memory device is provided, wherein said erasure prohibiting circuit permanently prohibits erasure of the data when an instruction to prohibit erasure is directed from the outside of said nonvolatile memory device.
According to a second aspect, in a nonvolatile memory device according to the first aspect, said erasure prohibiting circuit comprises an erasure prohibiting memory portion for storing either one of first information for prohibiting erasure or second information for permitting erasure.
According to the third aspect, in a nonvolatile memory device according to the second aspect, said erasure prohibiting circuit comprises in the erasure prohibiting memory portion, an erasure setting circuit for writing said first information, and a writing setting circuit for writing said second information.
According to a fourth aspect, a nonvolatile memory device according to the first aspect comprises: an erasure instructing resistor for storing a decoded erasure instruction for instructing erasure of the data content; and an erasing circuit for erasing the data content in a memory cell array based on an output of said erasure instructing resistor; wherein said erasure prohibiting circuit comprises an erasure prohibition control circuit for controlling whether or not an output of said erasure instructing resistor is transmitted to said erasing circuit.
According to a fifth aspect, in a nonvolatile memory device according to the first aspect, the nonvolatile memory device comprises an erasure instructing resistor for storing a decoded erasure instruction; and an erasing circuit for erasing the data content in the memory cell array based on an output of said erasure instructing resistor; wherein, said erasure prohibiting circuit comprises an erasure prohibition control circuit for controlling whether or not said erasure instructing resistor is reset based on a setting state of said erasure prohibition memory portion.
According to a sixth aspect, a nonvolatile memory device according to the third aspect comprises an erasure instructing resistor for storing a decoded erasure instruction for instructing erasure of the data content; and an erasing circuit for erasing the data content in the memory cell array based on the output of said erasure instructing resistor; wherein, said erasure prohibiting circuit comprises an erasure prohibition control circuit for controlling whether or not the output of said erasure instructing resistor is transmitted to said erasing circuit, and an erasure setting circuit is allowed to be energized, only when an output of said erasure prohibition control circuit outputs an erasure permission.
According to a seventh aspect, a nonvolatile memory device according to the third aspect comprises an erasure instructing resistor for storing a decoded erasure instruction; and an erasing
Miike Shogo
Uekubo Masaki
NEC Corporation
Nguyen Tan T.
Young & Thompson
LandOfFree
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