Nonvolatile semiconductor memory device and data writing method

Static information storage and retrieval – Floating gate – Multiple values

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

36518518, 36518523, 36518905, G11C 1604

Patent

active

059598824

ABSTRACT:
In a nonvolatile semiconductor memory device wherein a plurality of threshold voltages are set so as to store multivalued information in one memory cell, data is first written into the memory cell whose threshold voltage is the lowest as a written state from the erase level, and data is successively written into memory cells whose threshold voltages are higher.

REFERENCES:
patent: 4860258 (1989-08-01), Fruhauf et al.
patent: 4964079 (1990-10-01), Devin
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5200920 (1993-04-01), Norman et al.
patent: 5365486 (1994-11-01), Schreck
patent: 5440505 (1995-08-01), Fazio et al.
patent: 5450363 (1995-09-01), Christopherson et al.
patent: 5487036 (1996-01-01), Akaogi et al.
patent: 5539688 (1996-07-01), Yiu et al.
patent: 5544099 (1996-08-01), Hara
patent: 5555204 (1996-09-01), Endoh et al.
patent: 5566125 (1996-10-01), Fazio et al.
patent: 5570315 (1996-10-01), Tanaka et al.
patent: 5602789 (1997-02-01), Endoh et al.
patent: 5615153 (1997-03-01), Yiu et al.
patent: 5621682 (1997-04-01), Tanzawa et al.
patent: 5675537 (1997-10-01), Bill et al.
patent: 5677868 (1997-10-01), Takahashi et al.
patent: 5677869 (1997-10-01), Fazio et al.
patent: 5687114 (1997-11-01), Khan
patent: 5694357 (1997-12-01), Mori
patent: 5748533 (1998-05-01), Dunlap et al.
patent: 5754469 (1998-05-01), Hung et al.
patent: 5754475 (1998-05-01), Bill et al.
patent: 5757699 (1998-05-01), Takeshima et al.
patent: 5768188 (1998-06-01), Park et al.
patent: 5768191 (1998-06-01), Choi et al.
patent: 5768193 (1998-06-01), Lee et al.
patent: 5796652 (1998-09-01), Takeshima et al.
IEEE International Solid-State Circuits Conference, "A 3.3V 128Mb Multi-Level NAND Flash Memory for Mass Storage Applications", T. Jung, et al., Feb. 8, 1996, (7 pgs.).
IEEE Journal of Solid-State Circuits, vol. 31, No. 11, "A 117-mm.sup.2 3.3-V Only 128-Mb Multilevel NAND Flash Memory for Mass Storage Applications", T. Jung, et al., Nov. 1996, pp. 1575-1583.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Nonvolatile semiconductor memory device and data writing method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Nonvolatile semiconductor memory device and data writing method , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor memory device and data writing method will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-711103

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.