Nonvolatile semiconductor memory device and data write...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185280, C365S185240

Reexamination Certificate

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06954378

ABSTRACT:
A semiconductor integrated circuit device includes an nonvolatile semiconductor memory cell and a write control circuit. The write control circuit supplies first and second pre-programming pulses and staircase programming pulses to the memory cell independently of the write statuses thereof. The second pre-programming pulse is higher than the first pre-programming pulse by a first potential difference. The staircase programming pulses have an initial voltage lower than the second pre-programming pulse and increase the voltage at a rate of a second potential difference per pulse. The second potential difference is smaller than the first potential difference.

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T. Tanaka et al., “A 3.4 Mbyte/sec Programming 3-Level NAND Flash Memory Saving 40% Die Size Per Bit”, 1997 Symposium on VLSI Technology Digest of Technical Papers, pp. 65-66.

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