Static information storage and retrieval – Read only systems – Semiconductive
Patent
1988-07-27
1990-09-18
Hecker, Stuart N.
Static information storage and retrieval
Read only systems
Semiconductive
365185, 36518904, 36518905, G11C 700, G11C 1602
Patent
active
049583174
ABSTRACT:
Externally inputted data of one word line is temporarily stored in a latch circuit. In the writing cycle, the data stored and held in the latch circuit is collectively written in memory transistors connected to the selected word line. On this occasion, 0 V is applied to one of the control gate and the drain of the memory transistor in which "0" is written and a high voltage V.sub.PP is applied to the other of the control gate and the drain. Therefore, not only in the erasing cycle but also in the writing cycle, the operation is carried out by the movement of charges caused by the electron tunneling.
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patent: 4723225 (1988-02-01), Kaszubinski et al.
patent: 4811292 (1989-03-01), Watanabe
Suciu, et al., A 64K EEPROM with extended Temperature and Page Mode Operation, 1985 IEEE International Solid-State Circuits Conference, pp. 170-171, 336.
Hu, A 128K Flash EEPROM Using Double Polysilicon Technology, 1987 IEEE International Solid-State Circuits Conference, pp. 76-77, 345.
Kobayashi Kazuo
Nakayama Takeshi
Terada Yasushi
Bowler Alyssa H.
Hecker Stuart N.
Mitsubishi Denki & Kabushiki Kaisha
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