Nonvolatile semiconductor memory device and a method for...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185180

Reexamination Certificate

active

11495463

ABSTRACT:
A non-volatile semiconductor memory device comprise a memory cell array having a plurality of memory cell units each having a plurality of electrically-programmable memory cell connected in series, a plurality of word lines each connected to each of control gates of said plurality of memory cells, said plurality of word lines including a selected word line connected to a control gate of selected one of said memory cells for programming, and a plurality of unselected word lines different from said selected word line, a bit line connected to one end of said memory cell unit, and a source line connected to another end of the memory cell unit, wherein, when data is programmed into the selected memory cells, a first potential is supplied to said selected word line, and a first unselected word line adjacent, toward a source line side, to said selected word line is set to floating state, and thereafter, a second potential which is higher than said first potential is supplied to said selected word line.

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June Lee, et al., “A 1.8V 2Gb NAND Flash Memory for Mass Storage Applications”, 2003 IEEE International Solid-State Circuits Conference, Session 16, 2003, pp. 236-237.

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