Nonvolatile semiconductor memory device allowing high speed...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185130, C365S185110, C365S185180

Reexamination Certificate

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06922359

ABSTRACT:
Local buses for performing writing/reading of data are provided in correspondence to memory blocks each having a plurality of nonvolatile memory cells, and also circuits for performing writing/reading of data are provided in correspondence to the memory blocks. In addition, data transfer lines for bidirectionally transferring data are provided commonly to the memory blocks, and transfer switch gates for performing data transfer between the memory blocks are provided commonly to the memory blocks. The memory blocks are divided into banks, writing/reading of data on individual memory blocks are performed in units of banks, and parallel execution of writing and reading or of writing/reading and internal transfer is performed. Thus, it is possible to improve data transfer processing efficiency in a nonvolatile semiconductor device.

REFERENCES:
patent: 4456965 (1984-06-01), Graber et al.
patent: 5524225 (1996-06-01), Kranich
patent: 5652861 (1997-07-01), Mayo et al.
patent: 6307410 (2001-10-01), Matsui
E. Maayan et al., “A 512Mb NROM Flash Data Storage Memory with 8MB/s Data Rate.” IEEE International Solid-State Circuits Conference, Feb. 4, 2002, Digest of Technical Papers, pp. 100-101.

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