Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

2000-10-06

2001-08-28

Zarabian, A. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S149000

Reexamination Certificate

active

06282118

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor memory device, and more particularly to a Dynamic Random Access Memory (DRAM) having nonvolatile silicon oxide-silicon nitride-silicon oxide (ONO) gate.
BACKGROUND OF THE INVENTION
There are essentially two types of data memory devices used in computers today, “Nonvolatile” and “Volatile”. Common nonvolatile memory devices include well known Read Only Memory (ROM) devices that include EPROM (erasable programmable ROM) devices, EEPROM (electrically erasable programmable ROM) devices, and Flash EEPROM devices. These nonvolatile memory devices maintain the data stored therein, even when power to the device is removed, thus they are nonvolatile.
Volatile memory devices include Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM) devices. RAM devices in the prior art have been used for temporary data storage, such as during data manipulation, since writing data into, and reading data out of, the device is performed quickly and easily. However, a disadvantage of these devices is that they require the constant application of power, such as in the form of a data refresh signal, to refresh and maintain data stored in the memory cells of the chip. Once power supplied to the device is interrupted, the data stored in the memory cells of the chip is lost.
Hence, if one of the volatile memory devices can combine with a nonvolatile memory device, and thereby a nonvolatile memory device with advantages of high memory capacity, simple memory cell structure, fast data access, and nonvolatility, is provided.
SUMMARY OF THE INVENTION
The present invention provides a nonvolatile semiconductor memory device. A nonvolatile erasable programmable transistor having high process compatibility with conventional DRAM device is replaced to serve as a nonvolatile flash memory device. The cost of manufacture is low, and the memory device is easy to operation and has the advantages of both DRAM and flash memory.
The present invention provides a nonvolatile semiconductor memory device adapted for a semiconductor substrate is comprised of a control transistor having a first gate connected to a first word line, a first source connected to a first bit line, and a first drain; a storage capacitor connected to the first drain, and data stored in the capacitor is controlled by the control transistor; and a nonvolatile erasable programmable transistor having a second gate connected to a second word line, a second source connected to the first drain, and a second drain connected to a second bit line; wherein the data stored in the capacitor and nonvolatile erasable programmable transistor is transmitted and exchanged by a transfer circuit through the first and second bit lines.
The present invention also provides a nonvolatile memory circuit adapted for a semiconductor substrate is comprised of a plurality of dynamic random access memory (DRAM) cell, a plurality of nonvolatile erasable programmable (NEP) transistor, and a data buffer region. Each DRAM cell is comprised of a control transistor having a first gate connected to a first word line, a first source connected to a first bit line, and a first drain; and a storage capacitor connected to the first drain, and data stored in the capacitor is controlled by the control transistor. Each NEP transistor has a second gate connected to a second word line, a second source connected to the first drain, and a second drain connected to a second bit line. The data buffer region is coupled to the first and second bit lines. Wherein, the data stored in the capacitor and NEP transistor is transmitted and exchanged by the data buffer region through the first and second bit lines.
The present invention provides a method of operating a nonvolatile semiconductor memory device adapted for a nonvolatile semiconductor memory device comprised of a control transistor having a first gate connected to a first word line, a first source connected to a first bit line, and a first drain; a storage capacitor connected to the first drain, and data stored in the capacitor is controlled by the control transistor; and a nonvolatile erasable programmable transistor having a second gate connected to a second word line, a second source connected to the first drain, and a second drain connected to a second bit line, wherein the data stored in the capacitor and nonvolatile erasable programmable transistor is connected to a transfer circuit through the first and second bit lines, comprising the step of:
1) After power is turned on, the data stored in the nonvolatile erasable programmable transistor is transmitted to a transfer circuit through the second bit line, and then the data is transmitted to the storage capacitor through the first bit line;
2) After the data is transferred, the nonvolatile erasable programmable transistor is closed and the data is accessed with control transistor and storage capacitor; and
3) Before power is turned off, the data stored in the storage capacitor is transmitted to the transfer circuit through the first bit line, and then the data is transmitted to the nonvolatile erasable programmable transistor through the second bit line.


REFERENCES:
patent: 5043946 (1991-08-01), Yamauchi
patent: 5262986 (1993-11-01), Yamauchi
patent: 5590073 (1996-12-01), Arakawa
patent: 5623442 (1997-04-01), Gotou

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