Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

1997-03-18

1999-10-19

Nelms, David

Static information storage and retrieval

Floating gate

Multiple values

36523006, G11C 1604

Patent

active

059699850

ABSTRACT:
A bit line controller is provided for connecting a data input/output line and one bit line BL to each other. The bit line controller has a data latch for latching multilevel write data supplied from the data input/output line to the memory cell and a sense amplifier for sensing and latching data output to one bit line BL from the memory cell transistor. When the number of multilevel data to be output to one bit line BL is 2.sup.m (m is a natural number not smaller than 2)=n-level, the number of each of the data latch and sense amplifier is "m". Specifically, when the number is determined such that 2.sup.2 =4, the number of each of the data latch and the sense amplifier is two. As a result, there is provided a nonvolatile semiconductor memory device capable of decreasing the size of a column-system circuit and realizing a highly integrated structure.

REFERENCES:
patent: 5602789 (1997-02-01), Endoh et al.
patent: 5615165 (1997-03-01), Tanaka et al.
patent: 5671388 (1997-09-01), Hasbun
patent: 5815436 (1998-09-01), Tanaka et al.

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