Nonvolatile semiconductor memory device

Static information storage and retrieval – Powering – Data preservation

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365174, G11C 1121

Patent

active

044674570

ABSTRACT:
Disclosed is a nonvolatile semiconductor memory device in which the difference in level between a reference signal and the output signal of a memory array formed of floating gate MOS FETs is decided by means of a differential sense amplifier, and the result of the decision provides memory data. The reference signal is produced by a gate signal generator which produces a gate signal at a fixed voltage level at the time of testing and a gate signal at a voltage level obtained by dividing the supply voltage at the time of normal reading, and a reference signal generator which produces a reference signal at a level corresponding to the conductive resistance of a floating gate MOS FET with the same configuration of each memory cell whose control gate is supplied with the gate signal.

REFERENCES:
patent: 3922650 (1975-11-01), Schaffer
patent: 4094012 (1978-06-01), Perlegos et al.
patent: 4123799 (1978-10-01), Peterson

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