Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

1991-09-23

1994-02-22

LaRoche, Eugene R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072965, 307491, 36518901, H03K 301

Patent

active

052890538

ABSTRACT:
The stress applied to a gate insulation film can be reduced by raising the potentials of the source and drain terminals of input gate transistors whose gate are applied with a high potential to a Vcc level or the like, when a programming high potential (V.sub.PP) or a high potential for tri-state control is applied to an external input terminal of an input-stage circuit of an EPROM. Therefore, occurrence of problems of the reliability such as TDDB can be prevented and thus a highly reliable nonvolatile semiconductor memory device can be provided. Further, the elements can be miniaturized to increase the capacity of the nonvolatile semiconductor memory device, without scaling the conventional programming high potential and the high potential for tri-state control.

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patent: 4689504 (1987-08-01), Raghunathan et al.
patent: 4697101 (1987-09-01), Iwahashi et al.
patent: 4779015 (1988-10-01), Erdelyi
patent: 4952818 (1990-08-01), Erdelyi et al.
patent: 4958089 (1990-09-01), Fitzpatrick et al.

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