Static information storage and retrieval – Floating gate – Particular biasing
Patent
1981-09-16
1984-06-05
Popek, Joseph A.
Static information storage and retrieval
Floating gate
Particular biasing
365182, 352 23, G11C 1140
Patent
active
044532342
ABSTRACT:
A nonvolatile semiconductor memory device having floating gate type field effect transistors with floating gate electrodes. In the memory device, a source region, an active region and a drain region are formed in a first semiconductor region. A second semiconductor region is formed so as to electrically be insulated from the first semiconductor region. A floating gate electrode is formed on the first and second semiconductor regions with an insulating film interposed therebetween, respectively. The floating gate electrode faces the second semiconductor region with the insulating film interposed therebetween so that charge may be transferred between the floating gate electrode and second semiconductor region in order to control an amount of charge in the floating gate electrode.
REFERENCES:
patent: 3919711 (1975-11-01), Chow
patent: 4203158 (1980-05-01), Frohman-Bentchkowsky
patent: 4209849 (1980-06-01), Schrenk
W. S. Johnson et al., "A 16Kb Electrically Erasable Nonvolatile Memory," 1980, IEEE International Solid-State Circuits Conference, pp. 152-153, (with continuation of p. 153), Feb. 14, 1980.
Popek Joseph A.
Tokyo Shibaura Denki Kabushiki Kaisha
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