Nonvolatile semiconductor memory device

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518524, 36518911, G11C 1606

Patent

active

061117897

ABSTRACT:
Disclosed is a nonvolatile semiconductor memory device, operated under various modes of operation, which comprises a high voltage generating circuit, a word line voltage switching circuit, and a charge sharing circuit. The voltage switching circuit transfers to a row decoder circuit one of the various voltages corresponding to a selected mode of operation, and the charge sharing circuit is connected to an output node of the high voltage generating circuit. Further, when the memory device enters a program verify mode of operation from a program mode of operation, the charging sharing circuit lowers a word line voltage from a program voltage to a program verify voltage without charge loss, by means of charge sharing.

REFERENCES:
patent: 5530675 (1996-06-01), Hu
patent: 5661685 (1997-08-01), Lee et al.

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