Nonvolatile semiconductor memory device

Static information storage and retrieval – Floating gate – Particular biasing

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G11C 1140

Patent

active

048456802

ABSTRACT:
A nonvolatile memory device includes first and second voltage lines whose potentials are selectively set, first and second gate control lines, first to third MOS transistors which are serially connected between the first and second voltage lines, the first and third MOS transistors having gates respectively connnected to the first and second gate control lines and the second MOS transistor having a gate set in an electrically floating conditions, first and second capacitors respectively connected between the gate of the second MOS transistor and the gates of the first and third MOS transistors, and third capacitor connected between the gate and drain of the second MOS transistor.

REFERENCES:
patent: 4520466 (1985-05-01), Mashiko
patent: 4599706 (1986-07-01), Gutterman

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