Nonvolatile semiconductor memory device

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185230, C365S189040

Reexamination Certificate

active

07630242

ABSTRACT:
With this flash memory, because a plurality of memory blocks are formed on a surface of a single P-type well, a layout area can be made small. Further, when erasing data for a memory block to be erased, a voltage of the P-type well is applied to all word lines of a memory block to be not erased. Consequently, the voltage of the P-type well and the voltage of all word lines of the memory block to be not erased change at the same time. With this, it is possible to prevent a threshold voltage for the memory block to be not erased from changing.

REFERENCES:
patent: 5371702 (1994-12-01), Nakai et al.
patent: 5455789 (1995-10-01), Nakamura et al.
patent: 6512693 (2003-01-01), Honda et al.
patent: 2001-210808 (2001-08-01), None
patent: 2003-031704 (2003-01-01), None

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