Semiconductor device manufacturing: process – Making device array and selectively interconnecting
Reexamination Certificate
2006-09-11
2008-09-09
Garber, Charles D. (Department: 2812)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
C438S257000, C438S283000, C438S672000, C257SE21613, C257SE21662
Reexamination Certificate
active
07422932
ABSTRACT:
A nonvolatile semiconductor memory device includes a semiconductor substrate, a memory cell region which is disposed on the semiconductor substrate and has a transistor array of a stacked gate structure having a floating gate, a Ti-containing barrier which is disposed in an upper layer of the memory cell region and covers the memory cell region, and a passivation layer disposed above the Ti-containing barrier. A method of manufacturing the nonvolatile semiconductor memory device includes forming a memory cell structure on a memory cell region on a semiconductor substrate and forming a necessary element structure in a peripheral circuit region except for the memory cell region on the semiconductor substrate, forming an interlayer insulating layer covering the memory cell structure and the element structure, forming a Ti-containing conductive film on the interlayer insulating layer, and forming a Ti-containing wiring layer in an upper layer of the peripheral circuit region by selectively etching the Ti-containing conductive film and forming a Ti-containing barrier in an upper layer of the memory cell region, the barrier covering the memory cell region.
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Saito Kazuo
Takamura Shogo
Garber Charles D.
Hogan & Hartson LLP
Kabushiki Kaisha Toshiba
Lee Cheung
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