Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

2008-03-11

2008-03-11

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185050

Reexamination Certificate

active

11411933

ABSTRACT:
In a nonvolatile memory cell, a selection transistor is connected to a memory cell transistor in series. The selection transistor is formed into a double layer gate structure, and has a voltage of each gate driven individually and separately. Using capacitive coupling between these stacked gate electrode layers of the selection transistor, a gate potential of the selection transistor is set to the predetermined voltage level. An absolute value of the voltage level generated by a voltage generator to the gates of the selection transistor can be made small, so that current consumption can be reduced and an layout area of the voltage generator can be reduced. Thus, a nonvolatile semiconductor memory device with a low current consumption and a small chip layout area is provided.

REFERENCES:
patent: 6067249 (2000-05-01), Lee et al.
patent: 6114724 (2000-09-01), Ratnakumar
patent: 6162682 (2000-12-01), Kleine
patent: 07-297304 (1995-11-01), None
patent: 2001-015617 (2001-01-01), None

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