Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-02-20
2007-02-20
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185130
Reexamination Certificate
active
11030152
ABSTRACT:
A non-volatile semiconductor memory device provides for higher integration by reducing the area of occupation of direct peripheral circuits, in which the memory cell of an AND type flash memory includes a selection gate, a float gate, a control gate that functions as a word line, and an n-type semiconductor region (source, drain) that functions as a local bit line. A pair of local bit lines adjacent to each other in a memory mat are connected with one global bit line at one end in the direction of the column of the memory mat, and a selection MOS transistor, formed by one enhancement type MOS transistor and one depletion type MOS transistor; is connected in series with each of the pair of local bit lines. One of the local bit lines is selected by turning the selection MOS transistor on/off.
REFERENCES:
patent: 5117389 (1992-05-01), Yiu
patent: 5717636 (1998-02-01), Dallabora et al.
patent: 2001-128428 (2001-05-01), None
patent: 2001-176275 (2001-06-01), None
Adachi Tetsuo
Haraguchi Keiichi
Kanamitsu Kenji
Kato Masataka
Antonelli, Terry Stout and Kraus, LLP.
Le Thong Q.
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