Nonvolatile semiconductor memory device

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Details

C365S185170, C365S185200, C365S185220

Reexamination Certificate

active

07061799

ABSTRACT:
The nonvolatile semiconductor memory device includes a memory cell array containing a plurality of nonvolatile memory cells and an initial setup data region in which initial setup data specified to determine operation conditions of the device is to be written. The device further includes a detection circuit which detects turn-on of power. The device further includes a readout circuit which reads out the initial setup data from the initial setup data region of the memory cell array upon detecting power-on by the detection circuit. The device further includes a determination circuit which determines whether the initial setup data read out by the readout circuit is effective or ineffective. The device further includes a setup circuit which sets up the device in an operative-prohibiting status when the initial setup data is determined as ineffective by the determination circuit.

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patent: 6680858 (2004-01-01), Nakamura et al.
patent: 6751122 (2004-06-01), Kawai et al.
patent: 6760256 (2004-07-01), Imamiya
patent: 2001-176290 (2001-06-01), None

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