Nonvolatile semiconductor memory device

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185010, C365S185330

Reexamination Certificate

active

06912161

ABSTRACT:
In the nonvolatile semiconductor memory device of this invention, a program control circuit1sets the threshold value of a first reference cell RFC0by means of a write circuit WC on the basis of a result of comparing the threshold value of the first reference cell RFC0with the threshold value of a second reference cell SRC executed by a sense amplifier8for trimming. The compare of threshold values by the sense amplifier8for trimming can be executed within a shorter time than in the threshold value read operation of the first reference cell RFC0.Therefore, when the number of the first reference cells is increased, the threshold value adjustment time can be remarkably reduced in comparison with the prior art in which the threshold value of the first reference cell is adjusted by reading the first reference cell.

REFERENCES:
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patent: 6072724 (2000-06-01), Yamazaki et al.
patent: 6075738 (2000-06-01), Takano
patent: 6466480 (2002-10-01), Pekny
patent: 6584017 (2003-06-01), Maayan et al.
patent: 6768689 (2004-07-01), Origasa
patent: 2003/0002335 (2003-01-01), Kwon
patent: 10-261768 (1998-09-01), None

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