Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

2005-06-07

2005-06-07

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185030

Reexamination Certificate

active

06903975

ABSTRACT:
A nonvolatile semiconductor memory device includes a memory cell, formed in a well in a substrate and having a source, a drain, a first gate and a second gate. A word line control circuit drives a word line connected to the second gate, a program data holding circuit holds program data, a programming voltage generator circuit applies a programming voltage onto a bit line connected to the drain, and a discrimination circuit verifies the program data. Programming is conducted by applying positive voltages to the second gate and drain, while injecting hot electrons generated in a channel portion in a vicinity of the drain when 0V is applied to the well and source to increase a threshold voltage. Verification is conducted by applying a verify voltage to the second gate, while applying a positive voltage to the drain and 0V to the well and source, thereby verifying whether the positive voltage applied is maintained or comes down to 0V, depending upon the threshold voltage, by means of the discrimination circuit.

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