Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2002-01-28
2003-03-18
Nguyen, Tan T. (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185200, C365S185230
Reexamination Certificate
active
06535425
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims priority to Japanese Patent Applications Number 2001-020834 and 2001-051294 filed Jan. 29, 2001 and Feb. 26, 2001, the content of which are incorporated herein by reference in their entirety.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device including a booster circuit for generating a high voltage and a reference voltage generator circuit for maintaining the voltage generated by the booster circuit at a constant level.
2. Description of the Related Art
In recent years, rewritable nonvolatile semiconductor memory devices (nonvolatile memories) represented by flash memories have been used in a variety of apparatuses, such as mobile phones, printers, network apparatuses, and have been widespread in the market. Hereinafter, the flash memory will be described as a representative nonvolatile memory.
In general, the flash memory includes a plurality of memory cells (only one is shown in
FIG. 4
) provided on the same substrate. As shown in
FIG. 4
, the memory cell includes: diffusion regions
21
and
22
which are source and drain regions, respectively; oxide films
23
and
25
; a floating gate
24
having a function of holding charge, and being sandwiched between the oxide films
23
and
25
so that the floating gate
24
is in a state of complete insulation against electricity; and a control gate
26
provided on the oxide film
25
. A voltage applied to the control gate
26
allows the charge to be injected into (programming=writing of data) and drawn from (deleting of data) the floating gate
24
, and such a voltage also allows a memory cell selection when reading charge information stored in the floating gate
24
.
Since the charge (electron) is generally carried by a tunnel current flowing through the oxide film
23
or by activated hot electrons, the oxide film
23
is also referred to as a tunnel film. The charge injected through the oxide film
23
into the floating gate
24
is almost permanently held in the floating gate
24
unless a specific electric field is applied to the floating gate
24
. Thus, information written in the flash memory can be stored for a long period of time without applying a specific voltage for retaining the information.
As described above, writing or deleting of data in the flash memory are performed by the hot electrons or the tunnel current, and this involves the application of a high voltage to the control gate
26
and the source and drain regions
21
and
22
. This high voltage is generally higher than a power source voltage applied to the flash memory by a normal power source (hereinafter, referred to as the “power source VCC”). When the flash memory has a memory capacity of up to several M (mega) bits, the high voltage is supplied via an external terminal (hereinafter, referred to as the “external terminal VPP”) to the flash memory. Therefore, a system including the flash memory requires not only the normal power source VCC but also a power source which applies a high voltage used for writing or deleting of data via the external terminal VPP to the flash memory.
However, in mobile apparatuses which have come into wide use in recent years, it is difficult to include such a power source for generating a high voltage in addition to the normal power source VCC. Thus, in general, a flash memory of a latest model uses an internal booster circuit so as to internally generate a high voltage. Very recently, single-power source flash memories operated at a power source voltage of 1.8 V have appeared. Although it depends on a type of memory cells included in the flash memory, such a single-power source flash memory generally requires a high voltage equal to or more than 10 V as the internally-generated high voltage. Thus, in an apparatus including the single-power source flash memory, a booster circuit included in the single-power source flash memory generates a voltage equal to or more than 10 V using the power source voltage of 1.8 V.
Referring to
FIG. 5
, a process for programming a conventional flash memory cell will now be described. The conventional flash memory cell described in the following is a channel hot electron injection-type memory cell which is programmed using hot electrons.
FIG. 5
illustrates a schematic structure of a conventional flash memory including: a flash memory cell
1
; an X-decoder
2
; a Y-decoder
3
; a source switch
4
; regulators
5
and
6
; booster circuits
7
and
9
; a reference voltage generator circuit
8
; a high voltage switch
10
; a low-frequency oscillator circuit
11
; and an OR gate
44
.
The flash memory cell
1
includes: a drain terminal connected via a bit line to the Y-decoder
3
, a gate terminal connected via a word line to the X-decoder
2
, and a source terminal connected to the source switch
4
. In practice, the flash memory includes a plurality of flash memory cells
1
provided in a matrix form and each flash memory
1
is selected by the X-decoder
2
and the Y-decoder
3
. The source switch
4
is used for applying a high voltage to the source terminal of the flash memory cell
1
when deleting data in the flash memory cell
1
and is used for electrically connecting the source terminal of the flash memory cell
1
to ground when programming the flash memory cell
1
or reading data in the flash memory cell
1
. The regulator
5
stabilizes (regulates) a high voltage
38
of about 10 V generated in the booster circuit
7
based on a reference signal
39
output by the reference voltage generator circuit
8
and the stabilized voltage is applied to an input terminal of the Y-decoder
3
. The regulator
6
stabilizes the high voltage
38
of about 10 V generated in the booster circuit
7
based on the reference signal (voltage)
39
output by the reference voltage generator circuit
8
and the stabilized voltage is output from an output terminal of the regulator
6
to the high voltage switch
10
and then to an input terminal of the X-decoder
2
. The booster circuit
9
supplies a voltage required for reading data via the high voltage switch
10
to the input terminal of the X-decoder
2
.
Although the flash memories are classified into two types, i.e., NOR-type flash memories and NAND-type flash memories, by the positional arrangement of flash memory cells. In the NOR-type flash memory, a memory cell threshold voltage is required to be always positive for structural reasons. Moreover, a value of the threshold voltage varies within a range of several volts, and therefore, in order to correctly read data in all the memory cells, it is necessary to apply a voltage equal to or more than the threshold voltage to a gate of each memory cell. In general, the voltage equal to or more than the threshold voltage is about between 4 V and 5 V and the booster circuit
9
for reading is used to generate such a voltage. Moreover, while a voltage is applied to the flash memory by a power source, the voltage (output
37
) required for reading is always required to be output from the output terminal of the booster circuit
9
for reading irrespective of whether the flash memory is on standby or in operation. The reason for this is that unlike the case of programming the flash memory or deleting data in the flash memory, time allowed for reading data in the flash memory is required to be 100 ns or less, but several hundred nanoseconds or more are required as a latency time until the booster circuit
9
is activated and generates a prescribed voltage.
Accordingly, the booster circuit
9
is required to continuously supply a constant voltage to the flash memory. However, in the case where the booster circuit
9
is caused to be continuously in operation, a current of several milliamperes (mA) is consumed even when the flash memory is on standby. Since the flash memory is often used in a mobile apparatus, a standby current thereof is required to be 100 &mgr;A or less at most. In order to realize the standby current of 100 &mgr;A or less, in general, the b
Ihara Makoto
Ishii Toshiji
Nawaki Masaru
Nguyen Tan T.
Sharp Kabushiki Kaisha
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