Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2008-01-08
2008-01-08
Mai, Son L. (Department: 2827)
Static information storage and retrieval
Interconnection arrangements
C365S189011
Reexamination Certificate
active
07317630
ABSTRACT:
A nonvolatile memory apparatus includes a separate controller circuit and memory circuit. The controller circuit is fabricated on a first integrated circuit chip. The controller circuit includes a plurality of charge pump circuits, a system interface logic circuit, a memory control logic circuit, and one or more analog circuits. The memory circuit is fabricated on a second integrated circuit chip and includes a column decoder, a row decoder, a control register, and a data register. A memory-controller interface area includes a first plurality of die bond pads on the first integrated circuit chip and a second plurality of die bond pads on the second integrated circuit chip such that the first and second integrated circuit chips may be die-bonded together. A single controller circuit may interface with a plurality of memory circuits, thus further reducing overall costs as each memory circuit does not require a dedicated controller circuit.
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Adusumilli Vijay P.
Gupta Anil
Hui Edward
Schumann Steven J.
Telecco Nicola
Atmel Corporation
Mai Son L.
Schneck Thomas
Schneck & Schneck
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