Nonvolatile semiconductor memory, and method for reading data

Details Nonvolatile semiconductor memory, and method for reading data Nonvolatile semiconductor memory, and method for reading data

2011-04-12

2011-04-12

Luu, Pho M. (Department: 2824)

Static information storage and retrieval

Floating gate

Multiple values

C365S185140, C365S185260, C365S185270

Reexamination Certificate

active

07924612

ABSTRACT:
A nonvolatile semiconductor memory includes a memory cell, a first gate control circuit that is coupled to the memory cell, and a second gate control circuit that is coupled to the memory cell. The memory cell includes a first gate electrode that is formed above a channel region in a semiconductor substrate, a second gate electrode that is formed beside the first gate electrode, and that is capacitively coupled with the first gate electrode through a first insulating layer, and a charge trapping layer that is formed between the channel region and the second gate electrode, and that includes a second insulating layer for trapping a charge. Data stored in a memory cell transistor including the second gate electrode changes depending on an amount of the charge trapped in the charge trapping layer. The first gate control circuit applies a potential to the first gate electrode, when reading the data stored in the memory cell transistor. The second gate control circuit brings the second gate electrode into a floating state, when the potential is applied to the first gate electrode.

REFERENCES:
patent: 5808936 (1998-09-01), Nakayama
patent: 6735118 (2004-05-01), Ogura et al.
patent: 6934195 (2005-08-01), Cernea
patent: 7525145 (2009-04-01), Shukuri

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