Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2002-09-30
2004-07-27
Nguyen, Tan T. (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185190, C365S185220
Reexamination Certificate
active
06768682
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory and particularly to a technology for programming memory cells by gradually increasing a programming voltage.
2. Description of the Related Art
A technique disclosed in Japanese Unexamined Patent Application Publication No. Hei 11-31391 is known as a nonvolatile semiconductor memory in which memory cells are programmed by gradually increasing a programming voltage. In this technique, in order to set the threshold voltages of the memory cells to a target value with high accuracy, the increment of the programming voltage to be applied to the memory cells is gradually reduced.
In the above technique, however, since the increment of the programming voltage is gradually reduced, the variation amount of the threshold voltages is reduced as the threshold voltages approach the target value. That is, the variation amount of the threshold voltages decreases with increasing number of times programmed. For this reason, there was a problem that the higher the accuracy of setting the threshold voltages, the greater the number of times programmed in which the threshold voltages reach the target value. In other words, it was hard to establish compatibility between the improvement of the accuracy of the setting of the threshold voltages and the reduction of the programming time.
Besides, the increment of the programming voltage is made different each time a program is performed. Accordingly, the circuit for generating the programming voltage was complicated, resulting in a complicated layout design.
Recently, there has been developed a nonvolatile semiconductor memory having multilevel memory cells each capable of storing a plurality of bits of data. With respect to this kind of multilevel memory cells, setting the threshold voltage of each memory cell to a plurality of kinds of voltages causes each memory cell to store therein a plurality of bits of data. For example, with respect to four-level memory cells, it is necessary to program three kinds of threshold voltages into each memory cell in accordance with data. Thus, multilevel memory cells must be set with higher accuracy than two-level memory cells. Besides, the programming time of the multilevel memory cells must be reduced as much as possible.
SUMMARY OF THE INVENTION
It is an object of the present invention to reduce the programming time of nonvolatile semiconductor memories.
It is another object of the present invention to reduce the programming time in a nonvolatile semiconductor memory having multilevel memory cells, while controlling threshold voltages of the memory cells with high accuracy.
According to one of the aspects of the present invention, when data is programmed into a plurality of electrically data-rewritable nonvolatile memory cells, the programming voltage, while gradually increased, is applied to the memory cells a plurality of times. During this programming, the increment of the programming voltage is set to a first voltage, which is maintained until the threshold voltages of all the memory cells to be programmed reach an initial value. Thereafter, the increment of the programming voltage is set to a second voltage, which is maintained until the threshold voltages reach a target value. The settings of the first and second voltages and the generation of the programming voltage are performed by, for example, a programming voltage generator.
This way, the programming voltage is increased, with its increment not varied, until the threshold voltages of all the memory cells to be programmed reach the initial value. This allows those threshold voltages to get close to the target value in a smaller number of times programmed. Besides, setting the increment of the programming voltage to the second voltage after the threshold voltages exceed the initial value can minimize the deviation of the threshold voltages from the target value. As a result, the smaller number of times programmed allows the threshold voltages of the memory cells to be programmed with high accuracy. Also, since the number of times programmed is small, the time required to program the memory cells can be reduced.
In addition, since there are only two kinds of increments in the programming voltages, which are the first and second voltages, the programming voltage generator can be simply configured. Particularly, since there are fewer kinds of elements to be formed in the programming voltage generator, layout designing is easier.
According to another aspect of the present invention, since the first voltage is greater than the second voltage, there may be a fewer number of times programmed until the threshold voltages of the memory cells get close to the target value. The increment of the programming voltage becomes smaller after the threshold voltages get close to the target value. As a result, there may be less dispersion of the threshold voltages of the memory cells to be programmed.
According to another aspect of the present invention, a source line is connected to sources of the memory cells, while bit lines are connected to drains of the memory cells. When the threshold voltages are detected, a voltage setting circuit applies a predetermined gate voltage to control gates of the memory cells and applies a predetermined source voltage to the source line. At this moment, memory cell currents flow through the source-drain path of each of the memory cells, causing currents to occur in the respective bit lines. Threshold voltage detectors each detect the threshold voltages by the memory cell currents flowing through the respective bit lines. The threshold voltage detectors are connected to the bit lines, respectively. Accordingly, the threshold voltages of all the memory cells to be programmed can be detected at the same time. Thus, even when applying the programming voltage and detecting the threshold voltages a plurality of times, the programming time can be prevented from increasing.
According to another aspect of the present invention, when the threshold voltages are detected to have reached the initial value and the target value, the voltage setting circuit keeps the gate voltage constant in value and makes the source voltage different in value. Keeping the gate voltage constant in value during detecting the threshold voltages can maintain the gains of the memory cell transistors constant. For this reason, the threshold voltages can be detected with high accuracy.
Besides, since the initial value is lower than the target value, the memory cell currents of the initial value are greater than those of the target value. Accordingly, for example, when the source voltage during detecting the initial value is set to be higher than the source voltage during detecting the target value, the memory cell currents relatively decrease, so that the transient rise in voltage of the source line can be made small.
According to another aspect of the present invention, the threshold voltage detectors each include a latch circuit and a latch control circuit. The latch circuit holds program data to be programmed. The latch circuit outputs the data held therein to one of the bit lines during programming the memory cells. When the threshold voltages are detected to have reached the initial value and the target value, respectively, by variations in voltage of the bit lines, the latch control circuit inverts the data of the latch circuit. Accordingly, by only reading the data held by the latch circuits, it can be recognized that the threshold voltages of the memory cells have reached the initial value (or the target value). That is, the programming voltage to be applied in the next program can be easily obtained. Also, the latch circuits, having their data inverted, invert the levels to be outputted to the respective bit lines during the following programming. For this reason, the programming voltage can be prevented from further being applied to the memory cells whose threshold voltages have reached the initial value (or the target value). As a result, the th
Sakashita Mototada
Yano Masaru
Arent Fox
Fujitsu Limited
Nguyen Tan T.
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