Nonvolatile semiconductor memory and data writing method for...

Details Nonvolatile semiconductor memory and data writing method for... Nonvolatile semiconductor memory and data writing method for...

2009-07-15

2011-12-27

Le, Vu (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185300

Reexamination Certificate

active

08085597

ABSTRACT:
A method having the steps of applying the same gate voltage to each of gate terminals of a plurality of memory cells via word lines to designate the memory cells as a write target, and simultaneously applying a write voltage that corresponds to each write data across drain-source terminals of two or more memory cells that are write targets via bit lines to write simultaneously a plurality of data elements having mutually different data values to the memory cells.

REFERENCES:
patent: 6522585 (2003-02-01), Pasternak
patent: 6930924 (2005-08-01), Takase et al.
patent: 2008-085196 (2008-04-01), None

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