Nonvolatile semiconductor memory and data reading method

Details Nonvolatile semiconductor memory and data reading method Nonvolatile semiconductor memory and data reading method

2007-09-28

2010-11-30

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Floating gate

Multiple values

C365S185220, C365S210100

Reexamination Certificate

active

07843724

ABSTRACT:
A nonvolatile semiconductor memory that includes a memory cell array including a plurality of electrically writable memory cells; a plurality of word lines and a plurality of bit lines connected to the plurality of memory cells; and a data reading and programming control section. The data reading and programming cortrol section includes: an adjacent memory cell data reading section; an adjacent memory cell data memory section; a reading voltage level control section; a data reading section for reading the data from a first memory cell at a plurality of reading voltages corresponding to a plurality of predetermined reading voltage verify levels controlled using the reading voltage level control section; and a data determining section for deterraining which data of 4-value data is programmed in the first memory cell based on the data which is read by the data reading section.

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U.S. Appl. No. 12/534,336, filed Aug. 3, 2009, Futatsuyama, et al.

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