Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-04-30
2008-10-14
Mai, Son L (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185170, C365S185220
Reexamination Certificate
active
07436714
ABSTRACT:
A nonvolatile semiconductor memory according to examples of the present invention includes a NAND string comprised memory cells connected in series, two select gate transistors each of which is connected to each end of the NAND string, and a write control circuit which makes a first write condition for a selected cell different from a second write condition for the selected cell. The first write condition is that the selected cell is one of two memory cells adjacent to the two select gate transistors. The second write condition is that the selected cell is one of the memory cells except for two memory cells adjacent to the two select gate transistors.
REFERENCES:
patent: 5621684 (1997-04-01), Jung
patent: 6091640 (2000-07-01), Kawahara et al.
patent: 6859394 (2005-02-01), Matsunaga et al.
patent: 2008/0043528 (2008-02-01), Isobe et al.
patent: 11-219595 (1999-08-01), None
patent: 2005-327436 (2005-11-01), None
Sawamura Kenji
Yaegashi Toshitake
Kabushiki Kaisha Toshiba
Mai Son L
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
LandOfFree
Nonvolatile semiconductor memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nonvolatile semiconductor memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4016082