Nonvolatile semiconductor memory

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185200, C365S185230

Reexamination Certificate

active

11245336

ABSTRACT:
A nonvolatile semiconductor memory includes a memory cell6composed of a memory cell transistor1having a floating gate and a control gate and a memory cell selecting transistor2, a reference cell12composed of a reference cell transistor30having the same structure as the memory cell transistor1and a reference cell selecting transistor8, and a reference word line potential generating circuit31connected to a gate of the reference cell selecting transistor8, wherein, in a reading operation, the same power supply voltage is applied between a floating gate and a source node of the reference cell transistor30, and an intermediate potential between a potential applied when the memory cell selecting transistor2is selected and a potential applied when the memory cell selecting transistor2is not selected is applied to the gate of the reference cell selecting transistor8.

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patent: 5936888 (1999-08-01), Sugawara
patent: 6021068 (2000-02-01), Miki et al.
patent: 6301156 (2001-10-01), Kurosaki
patent: 6407946 (2002-06-01), Maruyama et al.
patent: 6411549 (2002-06-01), Pathak et al.
patent: 6707715 (2004-03-01), Michael et al.
patent: 10-228790 (1998-08-01), None

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