Nonvolatile semiconductor memory

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185030, C365S189050

Reexamination Certificate

active

06850435

ABSTRACT:
A bit line is connected to a data circuit for use in a program/read time. The data circuit includes first, second, and third data storage units. The first data storage unit is connected to the bit line. A first data transfer circuit is connected between the first and third data storage units. A second data transfer circuit is connected between the second and third data storage units. The second data storage unit has a function of forcibly changing a value of data of the first data storage unit based on the data stored in the second data storage unit.

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patent: 6625060 (2003-09-01), Miyauchi
patent: 1 134 746 (2001-09-01), None
G.J. Hemink, et al. “Fast and Accurate Programming Method for Multi-Level NAND EEPROMs” 1995 Symposium on VLSI Technology Digest of Technical Papers 1999, pp. 129-130.

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