Nonvolatile semiconductor memory

Details Nonvolatile semiconductor memory Nonvolatile semiconductor memory

1988-01-28

1990-03-27

Moffitt, James W.

Static information storage and retrieval

Floating gate

Particular biasing

357 235, G11C 1134

Patent

active

049127497

ABSTRACT:
In a nonvolatile semiconductor memory according to the invention, a power source voltage of 5 V used in an ordinary read mode is applied to a read line in the data read mode without changing its value. If a write line, a selection gate line, a control gate line, and a read line are respectively set at 0 V, 5 V, 0 V, and 5 V in the data read mode, the potential at an n-type diffusion layer becomes 0 V. In this case, the potential at the control gate line is 0 V, and the potential at a floating gate electrode becomes substantially 0 V. That is, an electric field is not applied to a thin insulating film located between the floating gate electrode and the n-type diffusion layer. As a result, electron injection and discharge due to the tunnel effect do not occur.

REFERENCES:
patent: 4375087 (1983-02-01), Wanlass
patent: 4558344 (1985-12-01), Perlegos
patent: 4611309 (1986-09-01), Chuang
patent: 4628487 (1986-12-01), Smayling
patent: 4710900 (1987-12-01), Higuchi
patent: 4729115 (1988-03-01), Kauffmann
patent: 4752912 (1988-06-01), Guterman

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