Nonvolatile semiconductor memory

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185170

Reexamination Certificate

active

08040731

ABSTRACT:
A nonvolatile semiconductor memory of an aspect of the present invention comprises a voltage step-down circuit including a first and a second circuit to achieve a voltage drop and configured to decrease the first voltage to a second voltage less than the first voltage, a transfer transistor to transfer the second voltage to a word line, and a control circuit to generate the second voltage as a first write voltage in a first mode wherein the first write voltage less than or equal to a prescribed magnitude is applied to the word line, and to generate the second voltage as a second write voltage in a second mode wherein the second write voltage greater than the prescribed magnitude is applied to the word line, wherein the difference between the first voltage and the second voltage is greater than or equal to the threshold voltage of the transfer transistor.

REFERENCES:
patent: 7433236 (2008-10-01), Ha et al.
patent: 11-176175 (1999-07-01), None
patent: 2007-305204 (2007-11-01), None
U.S. Appl. No. 12/544,349, filed Aug. 20, 2009, Takahiro Otsuka et al.

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