Nonvolatile semiconductor for reading data at a read request eve

Static information storage and retrieval – Floating gate – Particular biasing

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36518904, G11C 1134

Patent

active

057576980

ABSTRACT:
A nonvolatile semiconductor memory device comprises an electrically erasable programmable memory cell array, a write-only word line and read-only word line provided in a row direction of the memory cell array and connected to corresponding memory cells and a write-only data line and read-only data line provided in a column direction of the memory cell array and connected to the memory cells. A write-only write control circuit for controlling the writing of data and read-only control circuit for controlling the reading of data as well as a write address control circuit are connected to the memory cell array such that, at a read request from an outside during the writing of data to the memory cell array, the write address control circuit checks whether or not there arises a coincidence between a read address and a write address and allows, when there arises a coincidence between these addresses, output polling relative to that data which is loaded as last write data and, when there arises no coincidence, effects switching from an operation of the write control circuit to that of the read control circuit, so that the corresponding data is read out of the memory array.

REFERENCES:
patent: 5317537 (1994-05-01), Shinagawa et al.
patent: 5594689 (1997-01-01), Kato

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