Nonvolatile semiconductor device with a verify function

Details Nonvolatile semiconductor device with a verify function Nonvolatile semiconductor device with a verify function

1996-10-16

1999-12-21

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

3651852, 365210, G11C 1606

Patent

active

060058056

ABSTRACT:
In a nonvolatile semiconductor memory device, flash memory cells are arranged in rows and columns and the individual memory cells 2nk are connected to word lines WLi and bit lines BLi. Further connected to the individual word lines WLi are verify cells 4n that are verified in place of the memory cells 2nk during the verification of the memory cells 2nk. The memory cells 2nk and verify cells 4n are formed into almost the same EEPROM structure having a floating electrode, except that the gate couple ratio of the verify cells 4n are set smaller than that of the gate couple ratio of the memory cells 2nk. Therefore, as long as electrons are injected sufficiently into these two types of cells, the threshold values of the verify cells 4n are always smaller than those of the memory cells 2nk. Consequently, when it is confirmed that the verify cells 4n have been verified, this means that the memory cells have been verified as well.

REFERENCES:
patent: 4223394 (1980-09-01), Pathak et al.
patent: 4811291 (1989-03-01), de Ferron
patent: 4833514 (1989-05-01), Esquivel et al.
patent: 5068697 (1991-11-01), Noda et al.
patent: 5134583 (1992-07-01), Matsuo et al.
patent: 5142496 (1992-08-01), Van Buskirk
patent: 5157626 (1992-10-01), Watanabe
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5265059 (1993-11-01), Wells et al.
patent: 5311466 (1994-05-01), Natale et al.
patent: 5335198 (1994-08-01), Van Buskirk et al.
patent: 5343434 (1994-08-01), Noguchi
patent: 5463587 (1995-10-01), Maruyama
patent: 5465231 (1995-11-01), Ohsaki
Kobayashi et al "Memory Array Architecture and Decoding Scheme for 3V Only Sector Erasable DINOR Flash Memory" LSI Laboratory, Mitsubishi Electric Corporation--pp. 97-98.
Yamada et al A Self-Convergence Erasing Scheme for a Simple Stacked Gate Flash EEPROM IEDM 91-307 11.4.1-11.4.4.

Affiliated with

Also associated with

Rating

Nonvolatile semiconductor device with a verify function does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Nonvolatile semiconductor device with a verify function, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor device with a verify function will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-511755