Nonvolatile semiconductive memory device and method of its manuf

Details Nonvolatile semiconductive memory device and method of its manuf Nonvolatile semiconductive memory device and method of its manuf

1978-01-30

1979-04-24

Wojciechowicz, Edward J.

357 52, 357 54, H01L 2978

Patent

active

041515382

ABSTRACT:
An MNOS nonvolatile semiconductive memory device of the type which has a thick gate insulating layer overlapping the source and drain regions and a thin gate insulator layer in the memory portion of the device includes a region of relatively high concentration of impurities of the same type conductivity as the substrate in the portion of the channel which is beneath the thin gate insulating layer. This increases the values of both the low threshold and the high threshold states of the memory portion of the devide, so as to increase the threshold voltage window of the device. The region is formed by ion implantation in such a manner that the thin gate insulator layer is also doped resulting in a device having improved stability.

REFERENCES:
patent: 3719866 (1973-03-01), Naber
patent: 4011576 (1977-03-01), Uchida et al.
patent: 4068217 (1978-01-01), Arnett et al.
patent: 4101921 (1978-07-01), Shimada et al.

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